Degree Granting Department
Arthur David Snider.
Transcapacitance, Modeling, Nonlinear, Small signal, Large-signal, Inconsistency, Discrepancy
The primary goal of this research is to put into code a unique approach to addressing problems apparent with nonlinear FET models which were exposed by Calvo in her work in 1994. Since that time, the simulation software for which her model was appropriate underwent a significant update, necessitating the rewriting of her model code for a few applicable FET models in a Verilog-A, making it more compatible with the new versions of software and simulators. The problems addressed are the inconsistencies between the small-signal model and the corresponding large-signal models due to a factor called transcapacitance. It has been noted by several researchers that the presence of a nonlinear capacitor in a circuit model mathematically implies the existence of a parallel transcapacitor, if the value of its capacitance is a function of two bias voltages, the local and a remote voltage.
Scholar Commons Citation
Nicodemus, Joshua, "An implementation of the usf/ calvo model in verilog-a to enforce charge conservation in applicable fet models" (2005). Graduate Theses and Dissertations.