Degree Granting Department
Don L. Morel
selenization, photovoltaics, semiconductors, renewable energy
Copper Indium Gallium DiSelenide absorber layers are fabricated using a two step manufacturing-friendly process. The first step involves the sequential deposition of Copper and Gallium and codeposition of Indium and Selenium, not necessarily in that order, at 275 C. This is followed by the second stage, where the substrate is annealed in the presence of Selenium and a thin layer of Copper is deposited to neutralize the excess Indium and Gallium on the surface to form the Copper Indium Gallium diSelenide absorber layer. Elimination of the need for high degree of control and elimination of toxic gases like hydrogen selenide aid in the easy scalability of this process to industry. The performance of CuInGaSeâ/CdS/ZnO solar cells thus fabricated was characterized using techniques such as I-V, C-V, Spectral Response and EDS/SEM.
Cells with open circuit voltages of 450-475 mV, short circuit current densities of 30-40 mA/cmÂ², fill factors of 60-68% and efficiencies of 8-12% were routinely fabricated. Gallium in small amounts seems to improve the open circuit voltages by 50-100 mV without significantly affecting the short circuit currents and the band gap in Type I precursors. Gallium also improves the adhesion of the CIS layer to the molybdenum back contact. Efforts are also being aimed at improving the short circuit current densities in our high bandgap devices. It is believed that improperly bonded Ga is hurting the electronic properties of the CIGS films. A part of this work involves the reduction of the detrimental effect of Ga on the Jsc's by modifying the base process, so as to improve the homogeneity of the film. The modifications include lowering the Ga level as well as fine-tuning the annealing step. Ar annealing of the samples has also been incorporated.
The short circuit current densities have been improved significantly by the above mentioned modifications. At present, the best Jsc's are in the 33-35 mA/cmÂ² range. The Voc's have also been improved by splitting the Ga into two layers and replacing the top Cu layer by a Ga layer. Light soaking studies of the absorber have also been carried out. The baseline Type I process has also been adapted to a new load-locked in-line evaporator system. Device performance dependence on Ga and In thickness as well as the top selenization temperature has been determined in this research. The effect of moisture on the quality of the films has been studied. Bandgap variations due to the presence/absence of Se during the Cu deposition has been investigated. The impact of substrate cleaning/Moly deposition conditions on the device performance has been explored. Insitu Ar annealing studies of CIGS absorbers have been carried out. Alternate buffer layers have been pursued.
Devices with Voc's as high as 480 mV, Jsc's as high as 40.7 mA/cmÂ² and fill factors of 66% have been fabricated.
Scholar Commons Citation
Sankaranarayanan, Harish, "Fabrication of CIGS absorber layers using a two-step process for thin film solar cell applications" (2004). Graduate Theses and Dissertations.