Graduation Year

2018

Document Type

Dissertation

Degree

Ph.D.

Degree Name

Doctor of Philosophy (Ph.D.)

Degree Granting Department

Computer Science and Engineering

Major Professor

Selçuk Köse, Ph.D.

Committee Member

Sanjukta Bhanja, Ph.D.

Committee Member

Ismail Uysal, Ph.D.

Committee Member

Mehran Kermani, Ph.D.

Committee Member

Fathi Amsaad, Ph.D.

Keywords

Process, Current, PVT, Regulator, Temperature, Voltage, Control

Abstract

Duty cycle and frequency are important characteristics of periodic signals that are exploited to develop a variety of application circuits in IC design. Controlling the duty cycle and frequency provides a method to develop adaptable circuits for a variety of applications. These applications range from stable on-chip clock generation circuits, on-chip voltage regulation circuits, and Physical unclonable functions for hardware security applications. Ring oscillator circuits that are developed with CMOS inverter circuits provide a simple, versatile flexible method to generated periodic signals on an IC chip. A digitally controlled ring oscillator circuit can be adapted to control its duty cycle and frequency. This work describes a novel current starved ring oscillator, with digitally controlled current source based headers and footers, that is used to provide a versatile duty cycle and a precise frequency control. Using this novel circuit, the duty cycle and frequency can be adapted to a wide range of values. The proposed circuit achieves i) a controlled duty cycle that can vary between 20% and 90% with a high granularity and ii) a compensation circuit that guarantees a constant duty cycle under process, voltage, and temperature (PVT) variations. A novel application of the proposed PWM circuit is the design and demonstration of a reliable and reconfigurable Duty-cycle based Physical unclonable function (PUF). The proposed PWM based PUF circuit is demonstrated to work in a reliable and stable operation for a variety of process, voltage and temperature conditions with circuit implementations using 22nm and 32nm CMOS technologies. A comparative presentation of the duty cycle based PUF are provided using standard PUF figures of merits.

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