Graduation Year

2004

Document Type

Thesis

Degree

M.S.E.E.

Degree Granting Department

Electrical Engineering

Major Professor

Bhanja, Sanjukta

Keywords

probabilistic model, simulation, clique, inference, sampling

Abstract

This thesis presents a novel, non-simulative, probabilistic model for switching activity in sequential circuits, capturing both spatio-temporal correlations at internal nodes and higher order temporal correlations due to feedback. Switching activity, one of the key components in dynamic power dissipation, is dependent on input streams and exhibits spatio-temporal correlation amongst the signals. One can handle dependency modeling of switching activity in a combinational circuit by Bayesian Networks [2] that encapsulates the underlying joint probability distribution function exactly. We present the underlying switching model of a sequential circuit as the time coupled logic induced directed acyclic graph (TC-LiDAG), that can be constructed from the logic structure and prove it to be a dynamic Bayesian Network.

Dynamic Bayesian Networks over n time slices are also minimal representation of the dependency model where nodes denote the random variable and edges either denote direct dependency between variables at one time instant or denote dependencies between the random variables at different time instants. Dynamic Bayesian Networks are extremely powerful in modeling higher order temporal as well as spatial correlations; it is an exact model for the underlying conditional independencies. The attractive feature of this graphical representation of the joint probability function is that not only does it make the dependency relationships amongst the nodes explicit but it also serves as a computational mechanism for probabilistic inference.

We use stochastic inference engines for dynamic Bayesian Networks which provides any-time estimates and scales well with respect to size We observe that less than a thousand samples usually converge to the correct estimates and that three time slices are sufficient for the ISCAS benchmark circuits. The average errors in switching probability of 0.006, with errors tightly distributed around the mean error values, on ISCAS'89 benchmark circuits involving up to 10000 signals are reported.

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