A Lightweight Concurrent Fault Detection Scheme for the AES S-Boxes Using Normal Basis
Document Type
Conference Proceeding
Publication Date
8-2008
Keywords
advanced encryption standard, fault detection, normal basis, S-box
Digital Object Identifier (DOI)
https://doi.org/10.1007/978-3-540-85053-3_8
Abstract
The use of an appropriate fault detection scheme for hardware implementation of the Advanced Encryption Standard (AES) makes the standard robust to the internal defects and fault attacks. To minimize the overhead cost of the fault detection AES structure, we present a lightweight concurrent fault detection scheme for the composite field realization of the S-box using normal basis. The structure of the S-box is divided into blocks and the predicted parities of these blocks are obtained. Through an exhaustive search among all available composite fields and transformation matrices that map the polynomial basis representation in binary field to the normal basis representation in composite field, we have found the optimum solution for the least overhead S-box and its parity predictions. Finally, using FPGA implementations, the complexities of the proposed schemes are compared to those of the previously reported ones. It is shown that the FPGA implementations of the S-box using normal basis representation in composite fields outperform the traditional ones using polynomial basis for both with and without fault detection capability.
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Citation / Publisher Attribution
Cryptographic Hardware and Embedded Systems – CHES 2008, p. 113-129
Scholar Commons Citation
Mozaffari Kermani, Mehran and Reyhani-Masoleh, Arash, "A Lightweight Concurrent Fault Detection Scheme for the AES S-Boxes Using Normal Basis" (2008). Computer Science and Engineering Faculty Publications. 60.
https://digitalcommons.usf.edu/esb_facpub/60
