Systolic Gaussian Normal Basis Multiplier Architectures Suitable for High-Performance Applications
Document Type
Article
Publication Date
9-2015
Keywords
systolic architecture, Cryptography, Gaussian normal basis (GNB), security
Digital Object Identifier (DOI)
https://doi.org/10.1109/TVLSI.2014.2345774
Abstract
Normal basis multiplication in finite fields is vastly utilized in different applications, including error control coding and the like due to its advantageous characteristics and the fact that squaring of elements can be obtained without hardware complexity. In this brief, we present decomposition algorithms to develop novel systolic structures for digit-level Gaussian normal basis multiplication over GF(2m). The proposed architectures are suitable for high-performance applications, which require fast computations in finite fields with high throughputs. We also present the results of our application-specific integrated circuit synthesis using a 65-nm standard-cell library to benchmark the effectiveness of the proposed systolic architectures. The presented architectures for multiplication can result in more efficient and high-performance VLSI systems.
Was this content written or created while at USF?
No
Citation / Publisher Attribution
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v. 23, issue 9, p. 1969-1972
Scholar Commons Citation
Azarderakhsh, Reza; Mozaffari Kermani, Mehran; Bayat-Sarmadi, Siavash; and Lee, Chiou-Yng, "Systolic Gaussian Normal Basis Multiplier Architectures Suitable for High-Performance Applications" (2015). Computer Science and Engineering Faculty Publications. 22.
https://digitalcommons.usf.edu/esb_facpub/22
